publication order number: ntf3055 ? 100/d ? semiconductor components industries, llc, 2006 february, 2006 ? rev. 3 1 ntf3055?100 preferred device power mosfet 3.0 amps, 60 volts n ? channel sot ? 223 designed for low voltage, high speed switching applications in power supplies, converters and power motor controls and bridge circuits. features ? pb ? free packages are available applications ? power supplies ? converters ? power motor controls ? bridge circuits maximum ratings (t c = 25 c unless otherwise noted) rating symbol value unit drain ? to ? source voltage v dss 60 vdc drain ? to ? gate voltage (r gs = 10 m ) v dgr 60 vdc gate ? to ? source voltage ? continuous ? non ? repetitive (t p 10 ms) v gs 20 30 vdc vpk drain current ? continuous @ t a = 25 c ? continuous @ t a = 100 c ? single pulse (t p 10 s) i d i d i dm 3.0 1.4 9.0 adc apk total power dissipation @ t a = 25 c (note 1) total power dissipation @ t a = 25 c (note 2) derate above 25 c p d 2.1 1.3 0.014 w w w/ c operating and storage temperature range t j , t stg ? 55 to 175 c single pulse drain ? to ? source avalanche energy ? starting t j = 25 c (v dd = 25 vdc, v gs = 10 vdc, i l (pk) = 7.0 apk, l = 3.0 mh, v ds = 60 vdc) e as 74 mj thermal resistance ? junction ? to ? ambient (note 1) ? junction ? to ? ambient (note 2) r ja r ja 72.3 114 c/w maximum lead temperature for soldering purposes, 1/8 from case for 10 seconds t l 260 c maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. when surface mounted to an fr4 board using 1 pad size, 1 oz. (cu. area 1.127 sq in). 2. when surface mounted to an fr4 board using minimum recommended pad size, 2 ? 2.4 oz. (cu. area 0.272 sq in). d g s 1 2 3 4 3.0 a, 60 v r ds(on) = 110 m n ? channel device package shipping ? ordering information ntf3055 ? 100t1 sot ? 223 1000/tape & reel sot ? 223 case 318e style 3 marking diagram & pin assignment ntf3055 ? 100t3 sot ? 223 4000/tape & reel ntf3055 ? 100t3lf sot ? 223 4000/tape & reel preferred devices are recommended choices for future use and best overall value. http://onsemi.com ntf3055 ? 100t3g sot ? 223 (pb ? free) 4000/tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specifications brochure, brd8011/d. 3055 a = assembly location ww = work week 3055 = specific device code = pb ? free package aww 1 gate 2 drain 3 source drain 4 (note: microdot may be in either location) sot ? 223 (pb ? free) ntf3055 ? 100t1g 1000/tape & reel
ntf3055 ? 100 http://onsemi.com 2 electrical characteristics (t a = 25 c unless otherwise noted) characteristic symbol min typ max unit off characteristics drain ? to ? source breakdown voltage (note 3) (v gs = 0 vdc, i d = 250 adc) temperature coefficient (positive) v (br)dss 60 ? 68 66 ? ? vdc mv/ c zero gate voltage drain current (v ds = 60 vdc, v gs = 0 vdc) (v ds = 60 vdc, v gs = 0 vdc, t j = 150 c) i dss ? ? ? ? 1.0 10 adc gate ? body leakage current (v gs = 20 vdc, v ds = 0 vdc) i gss ? ? 100 nadc on characteristics (note 3) gate threshold voltage (note 3) (v ds = v gs , i d = 250 adc) threshold temperature coefficient (negative) v gs(th) 2.0 ? 3.0 6.6 4.0 ? vdc mv/ c static drain ? to ? source on ? resistance (note 3) (v gs = 10 vdc, i d = 1.5 adc) r ds(on) ? 88 110 m static drain ? to ? source on ? resistance (note 3) (v gs = 10 vdc, i d = 3.0 adc) (v gs = 10 vdc, i d = 1.5 adc, t j = 150 c) v ds(on) ? 0.27 0.24 0.40 ? vdc forward transconductance (note 3) (v ds = 8.0 vdc, i d = 1.7 adc) g fs ? 3.2 ? mhos dynamic characteristics input capacitance (v ds = 25 vdc, v gs = 0 v, f = 1.0 mhz) c iss ? 324 455 pf output capacitance c oss ? 35 50 transfer capacitance c rss ? 110 155 switching characteristics (note 4) turn ? on delay time (v dd = 30 vdc, i d = 3.0 adc, v gs = 10 vdc, r g = 9.1 ) (note 3) t d(on) ? 9.4 20 ns rise time t r ? 14 30 turn ? off delay time t d(off) ? 21 45 fall time t f ? 13 30 gate charge (v ds = 48 vdc, i d = 3.0 adc, v gs = 10 vdc) (note 3) q t ? 10.6 22 nc q 1 ? 1.9 ? q 2 ? 4.2 ? source ? drain diode characteristics forward on ? voltage (i s = 3.0 adc, v gs = 0 vdc) (i s = 3.0 adc, v gs = 0 vdc, t j = 150 c) (note 3) v sd ? ? 0.89 0.74 1.0 ? vdc reverse recovery time (i s = 3.0 adc, v gs = 0 vdc, di s /dt = 100 a/ s) (note 3) t rr ? 30 ? ns t a ? 22 ? t b ? 8.6 ? reverse recovery stored charge q rr ? 0.04 ? c 3. pulse test: pulse width 300 s, duty cycle 2.0%. 4. switching characteristics are independent of operating junction temperatures.
ntf3055 ? 100 http://onsemi.com 3 5 0 6 1 2 3 4 figure 1. on ? region characteristics figure 2. transfer characteristics figure 3. on ? resistance versus gate ? to ? source voltage figure 4. on ? resistance versus drain current and gate voltage figure 5. on ? resistance variation with temperature figure 6. drain ? to ? source leakage current versus voltage v gs, gate ? to ? source voltage (volts) i d, drain current (amps) t j = 25 c t j = 100 c t j = ? 55 c 0 0.16 0.12 0.1 0.08 0.06 0 13 6 i d, drain current (amps) r ds(on), drain ? to ? source resistance ( ) i d, drain current (amps) r ds(on), drain ? to ? source resistance ( ) v gs = 15 v 2.2 1.8 1.6 1.4 t j , junction temperature ( c) r ds(on), drain ? to ? source resistance (normalized) ? 50 50 25 0 ? 25 75 125 100 i d = 1.5 a v gs = 10 v 0.8 0.6 150 1 10 1000 v ds, drain ? to ? source voltage (volts) i dss , leakage (na) 04060 30 20 10 50 100 5 2 0 1 4 2 1 v ds, drain ? to ? source voltage (volts) i d, drain current (amps) 0 6 v gs = 10 v v gs = 4 v v gs = 4.5 v v gs = 5 v 3 36 3.5 5 4 4.5 5.5 0.04 0.02 1.2 2 0 0.16 0.12 0.1 0.08 0.06 0 46 5 3 0.04 0.02 1 1 175 v gs = 10 v v gs = 8 v t j = 150 c t j = 100 c t j = 25 c t j = 25 c t j = 100 c t j = ? 55 c v ds 10 v v gs = 0 v 4 5 3 42 t j = 125 c 0.14 0.14 2 v gs = 6 v t j = ? 55 c t j = 100 c
ntf3055 ? 100 http://onsemi.com 4 10 10 15 5 020 525 r ds(on) limit v gs 100 1 0.1 0.01 100 10 1 12 4 2 0 60 20 10 0 3 0 800 500 400 gate ? to ? source or drain ? to ? source voltage (volts) c, capacitance (pf) 300 200 q g , total gate charge (nc) figure 7. capacitance variation figure 8. gate ? to ? source and drain ? to ? source voltage versus total charge v gs , gate ? to ? source voltage (volts) figure 9. resistive switching time variation versus gate resistance r g , gate resistance ( ) figure 10. diode forward voltage versus current v sd , source ? to ? drain voltage (volts) i s , source current (amps) t, time (ns) figure 11. maximum rated forward biased safe operating area v ds , drain ? to ? source voltage (volts) figure 12. maximum avalanche energy versus starting junction temperature t j , starting junction temperature ( c) i d , drain current (amps) e as , single pulse drain ? to ? source avalanche energy (mj) 010 8 412 1 10 100 0.54 0.66 0.62 0.58 0.78 0.1 10 100 1 25 125 150 100 75 175 50 i d = 3 a t j = 25 c v gs v gs = 0 v v ds = 0 v t j = 25 c c rss c iss c oss c rss 1 0.7 0.74 c iss v gs = 20 v single pulse t c = 25 c v ds = 30 v i d = 3 a v gs = 10 v v gs = 0 v t j = 25 c i d = 7 a 1 ms 100 s 10 ms dc t r t d(off) t d(on) v ds 0.9 30 40 50 q 2 q 1 q t 80 0 6 2 t f thermal limit package limit 100 600 6 10 700 8 10 2 70 0.82 0.86
ntf3055 ? 100 http://onsemi.com 5 10 1 0.001 100 10 1 0.1 0.001 1000 r(t), effective transient thermal response resistance (normalized) t, time (s) 1 x 1 inch 1 oz. cu pad (3 x 3 inch fr4) figure 13. thermal response 0.1 0.01 0.01 0.0001 0.00001
ntf3055 ? 100 http://onsemi.com 6 package dimensions sot ? 223 (to ? 261) case 318e ? 04 issue l a1 b1 d e b e e1 4 123 0.08 (0003) a l1 c notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 1.5 0.059 mm inches scale 6:1 3.8 0.15 2.0 0.079 6.3 0.248 2.3 0.091 2.3 0.091 2.0 0.079 soldering footprint* h e dim a min nom max min millimeters 1.50 1.63 1.75 0.060 inches a1 0.02 0.06 0.10 0.001 b 0.60 0.75 0.89 0.024 b1 2.90 3.06 3.20 0.115 c 0.24 0.29 0.35 0.009 d 6.30 6.50 6.70 0.249 e 3.30 3.50 3.70 0.130 e 2.20 2.30 2.40 0.087 0.85 0.94 1.05 0.033 0.064 0.068 0.002 0.004 0.030 0.035 0.121 0.126 0.012 0.014 0.256 0.263 0.138 0.145 0.091 0.094 0.037 0.041 nom max l1 1.50 1.75 2.00 0.060 6.70 7.00 7.30 0.264 0.069 0.078 0.276 0.287 h e ? ? e1 0 1 0 0 1 0 style 3: pin 1. gate 2. drain 3. source 4. drain *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?t ypicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license un der its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended f or surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in a ny manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2 ? 9 ? 1 kamimeguro, meguro ? ku, tokyo, japan 153 ? 0051 phone : 81 ? 3 ? 5773 ? 3850 ntf3055 ? 100/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082 ? 1312 usa phone : 480 ? 829 ? 7710 or 800 ? 344 ? 3860 toll free usa/canada fax : 480 ? 829 ? 7709 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.
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